1. Field of the Invention
The present invention relates to computer network systems and, more particularly, to a system and method for accessing registers of a Physical (PHY) device in a network.
2. Discussion of Related Art
A conventional PHY device in a conventional network such as an Ethernet network requires a set of registers therein for storing control data such as status data indicating the status of the PHY device. These registers are defined by and operate according to predetermined IEEE standards and specification 802.3 for Ethernet. A conventional register access operation of a conventional PHY device in the Ethernet will be described below referring to FIG. 1.
FIG. 1 is a block diagram of a conventional system 5 for accessing the registers of a PHY device for Ethernet. As shown in FIG. 1, the system 5 includes protocol and application layers 10, a Media Access Controller (MAC) driver 30, a MAC device 40, a Media Independent Interface (MII) 43, a PHY device 45 including registers 44, and a network medium 60 such as cables, all operatively coupled.
The MII 43 is a hardware interface for controlling communication between the MAC device 40 and other components of the network such as the PHY device 44. The MII 43 operates according to the well-defined IEEE standard 802.3. Particularly, the MII 43 includes, among other things, a Management Data Input/Output (MDIO) 42 used to communicate register read/write requests to the PHY device 45. The MDIO 42 basically is an input/output bus for transferring signals of some value between the MAC device 40 and the PHY device 45.
During a normal, i.e., payload data packet processing operation, data packets are transmitted from the protocol and application layers 10 to the MAC driver 30. The MAC driver 30, which is computer software for driving the MAC device 40, forwards the data packets to the MAC device 40 which in turn forwards the data packets to the PHY device 45 via the MII 43. The PHY device 45 converts the data packets into appropriate signals, for example, electrical or optical signals, and sends out the signals on the medium 60. This normal data packet process occurs according to predetermined standards and protocols.
When a particular component or application desires to access the register(s) 44 of the PHY device 45 (e.g., to check the status of the PHY device 45), the MAC driver 30 generates register read/write request signals for reading from or writing to the register(s) 44 of the PHY device 45, and loads these request signals to a designated register of the MAC device 40. At the same time, the MAC driver 30 interrupts the normal data packet processing operation so that the transfer of data packets is stopped temporarily. Then the register of the MAC device 40 loads the register read/write request signals onto the MDIO bus 42 of the MII 43. The PHY device 45 then receives the register read/write request signals that are output from the MDIO 42, and processes these request signals by reading from or writing to the designated register(s) 44 of the PHY device 45.
Once the accessing of the registers 44 of the PHY device 45 is completed, the MAC driver 30 controls the MAC device 40 to resume its normal data packet processing operation. The entire register access operation occurs according to predetermined standards and protocols.
Problems, however, arise in such a conventional system for accessing the registers of a PHY device. As networking technologies develop, modifications to the existing network standards may be desired, or new network standards are introduced. For example, additional registers for controlling additional parameters and new services, etc., may need to be added in the PHY device. However, since the MDIO of the MII is configured to operate only according to the fixed IEEE standards which do not necessarily accommodate proprietary modifications or new standards, the system 5 is not capable of controlling or accessing the new registers of the PHY device. The only way to implement the accessing of the new registers of the PHY device is to make significant modifications to the MAC device and the MAC driver. But, such modifications are expensive and rather complicated, and will require significant alterations to the existing, well-defined MAC hardware and software, which can affect the overall operation of the entire network system. Further, each time new industry network standards are introduced, the MAC hardware and software will need to change, which would be extremely expensive and likely to introduce computer “bugs” to the system.
Furthermore, the register access operation of the system 5 is extremely time consuming because the loading of the register read/write request signals to the MDIO is a low speed operation. As a result, as discussed above, the MAC driver can suspend the normal data packet processing operation of the system 5 for longer than would be desirable. This can create a significant time delay problem in the entire operation of the network and can degrade system data throughput.
Moreover, the conventional register access operation often results in a loss of critical data packets and data errors in the network because of the interruptions and resumptions of the normal data packet processing operation. Thus, the conventional register access operation is not a suitable technique by which modifications to the existing standards or introduction/addition of new standards can be implemented easily, cost-effectively and repeatedly in ever-evolving network systems.
It obviously is an advantage to reuse existing, well-defined network components such as MAC devices and MAC drivers from a technical reuse and cost perspective. Therefore, a need exists for a system and method for accessing registers of a PHY device in a network which overcomes problems encountered in conventional methods and systems without requiring significant modifications to the existing MAC devices and MAC drivers.